Beyond CMOS: Embracing Hybrid and New Technologies for the Future of Computing

Danielle Franklin
Sep 7
5 min read

Original publication dated: Jul 31, 2024

For decades, CMOS (Complementary Metal-Oxide-Semiconductor) technology has been the backbone of the semiconductor industry, enabling the miniaturization and performance improvements of integrated circuits that drive our modern digital world. However, as we approach the physical and economic limits of CMOS scaling, the search for new technologies to sustain the pace of innovation has become critical.

Limitations of CMOS

CMOS technology has been remarkably successful, but its limitations are becoming increasingly apparent. The continued downscaling of transistors, now reaching sub-10nm dimensions, faces significant challenges. Physically, as transistors shrink, issues such as increased power consumption, heat dissipation, and short-channel effects degrade performance. These effects make it difficult to maintain the power efficiency and reliability of CMOS devices at such small scales.

Economically, the cost of developing and manufacturing advanced CMOS nodes has risen exponentially. Each new generation of CMOS technology requires substantial investment in research and development, new fabrication facilities, and increasingly sophisticated equipment. This escalation in cost poses a barrier to entry for many companies and limits the overall economic sustainability of further CMOS scaling.

Expert Opinions

Experts across the semiconductor industry emphasize the urgency of moving beyond CMOS technology. Dr. Dmitri E. Nikonov and Ian A. Young from the Nanoelectronic Research Initiative (NRI) underscore the critical need for new benchmarking theories to consistently estimate the potential of alternative technologies. ‘Benchmarking these devices is crucial for consistent estimates of circuit area, switching time, and energy,’ they state in their comprehensive study on beyond-CMOS devices.

Dr. Alan Seabaugh, a professor at the University of Notre Dame and a leading researcher in TFETs, highlights the potential of these devices to significantly reduce power consumption in electronic circuits. ‘TFETs can achieve lower subthreshold swings compared to MOSFETs, offering a path to energy-efficient low-power applications,’ he explains.

Efficiency and Challenges of New Technologies

Emerging technologies promise to address these limitations by offering superior performance, efficiency, and scalability. However, each comes with its own set of implementation challenges. For example, 3D Integrated Circuits (3D ICs) like the Skybridge technology provide a significant leap in density and performance per watt by stacking layers vertically, but they require innovative solutions for thermal management and manufacturing processes to become viable.

Spintronics, leveraging the spin of electrons rather than their charge, offers potential improvements in speed and power efficiency. Spin Wave Logic Gates (SWLGs) enable parallel processing capabilities, but the technology is still in the early stages of development, requiring substantial advancements in material science and fabrication techniques to become commercially viable.

Phase-Change Memory (PCM) devices utilize materials that change phase to store data, offering non-volatility and high endurance. These characteristics make PCM suitable for applications requiring frequent read/write operations. However, integrating PCM with existing technology infrastructures presents challenges that must be addressed.

Cryogenic computing with superconducting devices like the Ferroelectric SQUID (FeSQUID) offers voltage-controlled logic gates that operate at cryogenic temperatures, beneficial for quantum computing and space applications. Despite their potential, these devices require significant advances in cryogenic cooling and superconducting materials to be practically implemented.

Tunneling Field-Effect Transistors (TFETs) leverage quantum tunneling to achieve lower subthreshold swings, leading to improved energy efficiency for low-power applications. TFETs show promise, but their integration with existing CMOS processes remains a challenge.

Silicon Photonics integrates optical components with electronic components on a silicon chip, enabling high-speed data transmission with lower power consumption and improved bandwidth compared to traditional electronic interconnects. Silicon photonics is particularly promising for data centers and high-performance computing applications.

Graphene transistors, known for their high electron mobility and conductivity, are being researched for high-frequency transistors and flexible electronics. The unique properties of graphene make it an attractive alternative for future high-speed, flexible, and wearable electronics.

Carbon Nanotubes (CNTs) have exceptional electrical properties, including high current-carrying capacity and excellent thermal conductivity. They are being explored for use in next-generation transistors and interconnects in integrated circuits, offering potential improvements in performance and efficiency over traditional silicon-based devices.

US Foundries and Production Rates

In the United States, several foundries are actively developing and producing these advanced semiconductor technologies. Globalfoundries Inc., for instance, has been heavily invested in the development of Gallium Nitride (GaN) on Silicon wafers at their Vermont facility, enhancing both civilian and military applications. Similarly, companies like Transphorm Inc. and Efficient Power Conversion Corporation are at the forefront of producing GaN semiconductors, essential for high-voltage power conversion and RF applications.

For Silicon Carbide (SiC) technology, Cree Inc. (now Wolfspeed) operates significant production facilities in North Carolina, focusing on power electronics for electric vehicles and industrial applications. These foundries typically produce tens of thousands of wafers per month, positioning the U.S. as a key player in the global semiconductor market.

Technology and Manufacturing Readiness Levels

The readiness of these technologies varies. GaN and SiC semiconductors are already in commercial use, particularly in power electronics and RF applications, indicating high technology readiness levels (TRLs) and manufacturing readiness levels (MRLs). Spintronics and 3D ICs like Skybridge are in advanced stages of research and early-stage commercialization, with TRLs and MRLs reflecting significant progress but still requiring further development before widespread adoption. PCM and Silicon Photonics are at intermediate TRLs and MRLs, with ongoing efforts to integrate them into mainstream applications.

Graphene and Carbon Nanotubes (CNTs) are in the research and development stage with promising laboratory results, but they face challenges in scaling up for commercial manufacturing, placing them at lower TRLs and MRLs.

Promising Technologies for the Future

Among the emerging technologies, GaN and SiC stand out due to their established commercial applications and significant performance advantages over traditional silicon. GaN’s high electron mobility and ability to operate at higher voltages and temperatures make it ideal for power electronics and RF applications. SiC’s higher thermal conductivity and breakdown electric field are crucial for high-power and high-temperature environments, such as in electric vehicles and industrial power supplies.

Silicon Photonics, with its capability to integrate optical components on silicon chips, presents a promising future for high-speed data transmission and improved bandwidth, particularly relevant for data centers and high-performance computing applications.

Graphene and Carbon Nanotubes (CNTs), with their exceptional electrical properties, offer promising alternatives for next-generation transistors and interconnects, potentially overcoming many of the limitations faced by traditional silicon-based devices.

In Summary

Moving beyond CMOS technology is not merely a possibility but a necessity to sustain the progress of the semiconductor industry. By embracing hybrid and new technologies such as GaN, SiC, Spintronics, and 3D ICs, we can overcome the limitations of traditional silicon-based transistors and pave the way for more efficient, powerful, and scalable computing solutions. While challenges remain, the concerted efforts of researchers, foundries, and industry stakeholders will undoubtedly drive these technologies from the lab to the market, ushering in a new era of innovation.

For more details please reference:

1. Dmitri E. Nikonov and Ian A. Young from the Nanoelectronic Research Initiative (NRI) emphasize the need for new benchmarking theories for alternative technologies. They highlight the importance of consistent estimates of circuit area, switching time, and energy. Source: [arxiv.org/pdf/1302.0244](https://arxiv.org/pdf/1302.0244)

2. Dr. Alan Seabaugh from the University of Notre Dame discusses the potential of TFETs to significantly reduce power consumption in electronic circuits, achieving lower subthreshold swings compared to MOSFETs, thus offering a path to energy-efficient low-power applications. Source: [arxiv.org/pdf/1302.0244](https://arxiv.org/pdf/1302.0244)

3. The challenges faced by emerging technologies such as 3D Integrated Circuits (3D ICs), Spintronics, Phase-Change Memory (PCM), Cryogenic computing, Tunneling Field-Effect Transistors (TFETs), Silicon Photonics, Graphene transistors, and Carbon Nanotubes (CNTs) are discussed, highlighting the need for innovative solutions for thermal management, material science advancements, and integration with existing infrastructures. Sources: [arxiv.org/pdf/1404.0607](https://arxiv.org/pdf/1404.0607), [arxiv.org/pdf/2109.05229](https://arxiv.org/pdf/2109.05229), [arxiv.org/pdf/2212.08202](https://arxiv.org/pdf/2212.08202)

4. The readiness levels of various technologies, including GaN, SiC, Spintronics, 3D ICs, PCM, Silicon Photonics, Graphene, and CNTs, are provided, indicating their current stage of commercial use or research and development. Sources: [arxiv.org/pdf/1302.0244](https://arxiv.org/pdf/1302.0244), [arxiv.org/pdf/1404.0607](https://arxiv.org/pdf/1404.0607), [arxiv.org/pdf/2109.05229](https://arxiv.org/pdf/2109.05229), [arxiv.org/pdf/2212.08202](https://arxiv.org/pdf/2212.08202)